ARM GAS /tmp/ccFWyvBN.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 1 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f4xx_hal_iwdg.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .text.HAL_IWDG_Init,"ax",%progbits 20 .align 1 21 .global HAL_IWDG_Init 22 .syntax unified 23 .thumb 24 .thumb_func 26 HAL_IWDG_Init: 27 .LVL0: 28 .LFB134: 29 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @file stm32f4xx_hal_iwdg.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief IWDG HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * functionalities of the Independent Watchdog (IWDG) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * + Initialization and Start functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * + IO operation functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ****************************************************************************** 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @attention 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * Copyright (c) 2016 STMicroelectronics. 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * All rights reserved. 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * This software is licensed under terms that can be found in the LICENSE file 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * in the root directory of this software component. 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ****************************************************************************** 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @verbatim 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ============================================================================== 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ##### IWDG Generic features ##### 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ============================================================================== 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) The IWDG can be started by either software or hardware (configurable 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** through option byte). 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ARM GAS /tmp/ccFWyvBN.s page 2 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) The IWDG is clocked by the Low-Speed Internal clock (LSI) and thus stays 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** active even if the main clock fails. 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Once the IWDG is started, the LSI is forced ON and both cannot be 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** disabled. The counter starts counting down from the reset value (0xFFF). 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** When it reaches the end of count value (0x000) a reset signal is 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** generated (IWDG reset). 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register, 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** the IWDG_RLR value is reloaded into the counter and the watchdog reset 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** is prevented. 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) The IWDG is implemented in the VDD voltage domain that is still functional 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** in STOP and STANDBY mode (IWDG reset can wake up the CPU from STANDBY). 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** IWDGRST flag in RCC_CSR register can be used to inform when an IWDG 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** reset occurs. 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Debug mode: When the microcontroller enters debug mode (core halted), 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** the IWDG counter either continues to work normally or stops, depending 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** on DBG_IWDG_STOP configuration bit in DBG module, accessible through 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros. 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** The IWDG timeout may vary due to LSI clock frequency dispersion. 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** STM32F4xx devices provide the capability to measure the LSI clock 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** frequency (LSI clock is internally connected to TIM5 CH4 input capture). 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** The measured value can be used to have an IWDG timeout with an 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** acceptable accuracy. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] Default timeout value (necessary for IWDG_SR status register update): 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** Constant LSI_VALUE is defined based on the nominal LSI clock frequency. 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** This frequency being subject to variations as mentioned above, the 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** default timeout value (defined through constant HAL_IWDG_DEFAULT_TIMEOUT 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** below) may become too short or too long. 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** In such cases, this default timeout value can be tuned by redefining 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** the constant LSI_VALUE at user-application level (based, for instance, 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** on the measured LSI clock frequency as explained above). 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ##### How to use this driver ##### 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ============================================================================== 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (#) Use IWDG using HAL_IWDG_Init() function to : 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** clock is forced ON and IWDG counter starts counting down. 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (++) Enable write access to configuration registers: 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** IWDG_PR and IWDG_RLR. 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (++) Configure the IWDG prescaler and counter reload value. This reload 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** value will be loaded in the IWDG counter each time the watchdog is 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** reloaded, then the IWDG will start counting down from this value. 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (++) Wait for status flags to be reset. 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (#) Then the application program must refresh the IWDG counter at regular 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** intervals during normal operation to prevent an MCU reset, using 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** HAL_IWDG_Refresh() function. 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** *** IWDG HAL driver macros list *** 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ==================================== ARM GAS /tmp/ccFWyvBN.s page 3 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** Below the list of most used macros in IWDG HAL driver: 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) __HAL_IWDG_START: Enable the IWDG peripheral 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** the reload register 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @endverbatim 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Includes ------------------------------------------------------------------*/ 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** #include "stm32f4xx_hal.h" 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @addtogroup STM32F4xx_HAL_Driver 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** #ifdef HAL_IWDG_MODULE_ENABLED 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @addtogroup IWDG 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief IWDG HAL module driver. 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Private typedef -----------------------------------------------------------*/ 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Private define ------------------------------------------------------------*/ 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @defgroup IWDG_Private_Defines IWDG Private Defines 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Status register needs up to 5 LSI clock periods divided by the clock 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** prescaler to be updated. The number of LSI clock periods is upper-rounded to 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 6 for the timeout value calculation. 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** The timeout value is calculated using the highest prescaler (256) and 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** the LSI_VALUE constant. The value of this constant can be changed by the user 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** to take into account possible LSI clock period variations. 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** The timeout value is multiplied by 1000 to be converted in milliseconds. 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** LSI startup time is also considered here by adding LSI_STARTUP_TIME 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** converted in milliseconds. */ 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** #define HAL_IWDG_DEFAULT_TIMEOUT (((6UL * 256UL * 1000UL) / (LSI_VALUE / 128U)) + \ 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ((LSI_STARTUP_TIME / 1000UL) + 1UL)) 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** #define IWDG_KERNEL_UPDATE_FLAGS (IWDG_SR_RVU | IWDG_SR_PVU) 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @} 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Private macro -------------------------------------------------------------*/ 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Private variables ---------------------------------------------------------*/ 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Private function prototypes -----------------------------------------------*/ 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Exported functions --------------------------------------------------------*/ 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions_Group1 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief Initialization and Start functions. 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @verbatim 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** =============================================================================== ARM GAS /tmp/ccFWyvBN.s page 4 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ##### Initialization and Start functions ##### 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** =============================================================================== 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] This section provides functions allowing to: 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Initialize the IWDG according to the specified parameters in the 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** IWDG_InitTypeDef of associated handle. 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** is reloaded in order to exit function with correct time base. 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @endverbatim 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief Initialize the IWDG according to the specified parameters in the 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * IWDG_InitTypeDef and start watchdog. Before exiting function, 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * watchdog is refreshed in order to have correct time base. 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * the configuration information for the specified IWDG module. 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @retval HAL status 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 30 .loc 1 165 1 view -0 31 .cfi_startproc 32 @ args = 0, pretend = 0, frame = 0 33 @ frame_needed = 0, uses_anonymous_args = 0 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** uint32_t tickstart; 34 .loc 1 166 3 view .LVU1 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Check the IWDG handle allocation */ 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** if (hiwdg == NULL) 35 .loc 1 169 3 view .LVU2 36 .loc 1 169 6 is_stmt 0 view .LVU3 37 0000 50B3 cbz r0, .L5 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** uint32_t tickstart; 38 .loc 1 165 1 view .LVU4 39 0002 38B5 push {r3, r4, r5, lr} 40 .LCFI0: 41 .cfi_def_cfa_offset 16 42 .cfi_offset 3, -16 43 .cfi_offset 4, -12 44 .cfi_offset 5, -8 45 .cfi_offset 14, -4 46 0004 0446 mov r4, r0 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** return HAL_ERROR; 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Check the parameters */ 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance)); 47 .loc 1 175 3 is_stmt 1 view .LVU5 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); 48 .loc 1 176 3 view .LVU6 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); 49 .loc 1 177 3 view .LVU7 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Enable IWDG. LSI is turned on automatically */ ARM GAS /tmp/ccFWyvBN.s page 5 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** __HAL_IWDG_START(hiwdg); 50 .loc 1 180 3 view .LVU8 51 0006 0368 ldr r3, [r0] 52 0008 4CF6CC42 movw r2, #52428 53 000c 1A60 str r2, [r3] 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 0x5555 in KR */ 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** IWDG_ENABLE_WRITE_ACCESS(hiwdg); 54 .loc 1 184 3 view .LVU9 55 000e 0368 ldr r3, [r0] 56 0010 45F25552 movw r2, #21845 57 0014 1A60 str r2, [r3] 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Write to IWDG registers the Prescaler & Reload values to work with */ 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** hiwdg->Instance->PR = hiwdg->Init.Prescaler; 58 .loc 1 187 3 view .LVU10 59 .loc 1 187 8 is_stmt 0 view .LVU11 60 0016 0368 ldr r3, [r0] 61 .loc 1 187 36 view .LVU12 62 0018 4268 ldr r2, [r0, #4] 63 .loc 1 187 23 view .LVU13 64 001a 5A60 str r2, [r3, #4] 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** hiwdg->Instance->RLR = hiwdg->Init.Reload; 65 .loc 1 188 3 is_stmt 1 view .LVU14 66 .loc 1 188 8 is_stmt 0 view .LVU15 67 001c 0368 ldr r3, [r0] 68 .loc 1 188 37 view .LVU16 69 001e 8268 ldr r2, [r0, #8] 70 .loc 1 188 24 view .LVU17 71 0020 9A60 str r2, [r3, #8] 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Check pending flag, if previous update not done, return timeout */ 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** tickstart = HAL_GetTick(); 72 .loc 1 191 3 is_stmt 1 view .LVU18 73 .loc 1 191 15 is_stmt 0 view .LVU19 74 0022 FFF7FEFF bl HAL_GetTick 75 .LVL1: 76 .loc 1 191 15 view .LVU20 77 0026 0546 mov r5, r0 78 .LVL2: 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Wait for register to be updated */ 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** while ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 79 .loc 1 194 3 is_stmt 1 view .LVU21 80 .L3: 81 .loc 1 194 9 view .LVU22 82 .loc 1 194 16 is_stmt 0 view .LVU23 83 0028 2368 ldr r3, [r4] 84 .loc 1 194 26 view .LVU24 85 002a DA68 ldr r2, [r3, #12] 86 .loc 1 194 9 view .LVU25 87 002c 12F0030F tst r2, #3 88 0030 0DD0 beq .L11 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT) 89 .loc 1 196 5 is_stmt 1 view .LVU26 ARM GAS /tmp/ccFWyvBN.s page 6 90 .loc 1 196 10 is_stmt 0 view .LVU27 91 0032 FFF7FEFF bl HAL_GetTick 92 .LVL3: 93 .loc 1 196 24 view .LVU28 94 0036 401B subs r0, r0, r5 95 .loc 1 196 8 view .LVU29 96 0038 41F60103 movw r3, #6145 97 003c 9842 cmp r0, r3 98 003e F3D9 bls .L3 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** if ((hiwdg->Instance->SR & IWDG_KERNEL_UPDATE_FLAGS) != 0x00u) 99 .loc 1 198 7 is_stmt 1 view .LVU30 100 .loc 1 198 17 is_stmt 0 view .LVU31 101 0040 2368 ldr r3, [r4] 102 .loc 1 198 27 view .LVU32 103 0042 DB68 ldr r3, [r3, #12] 104 .loc 1 198 10 view .LVU33 105 0044 13F0030F tst r3, #3 106 0048 EED0 beq .L3 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** return HAL_TIMEOUT; 107 .loc 1 200 16 view .LVU34 108 004a 0320 movs r0, #3 109 004c 03E0 b .L2 110 .L11: 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Reload IWDG counter with value defined in the reload register */ 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** __HAL_IWDG_RELOAD_COUNTER(hiwdg); 111 .loc 1 206 3 is_stmt 1 view .LVU35 112 004e 4AF6AA22 movw r2, #43690 113 0052 1A60 str r2, [r3] 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Return function status */ 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** return HAL_OK; 114 .loc 1 209 3 view .LVU36 115 .loc 1 209 10 is_stmt 0 view .LVU37 116 0054 0020 movs r0, #0 117 .L2: 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 118 .loc 1 210 1 view .LVU38 119 0056 38BD pop {r3, r4, r5, pc} 120 .LVL4: 121 .L5: 122 .LCFI1: 123 .cfi_def_cfa_offset 0 124 .cfi_restore 3 125 .cfi_restore 4 126 .cfi_restore 5 127 .cfi_restore 14 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } 128 .loc 1 171 12 view .LVU39 129 0058 0120 movs r0, #1 130 .LVL5: 131 .loc 1 210 1 view .LVU40 ARM GAS /tmp/ccFWyvBN.s page 7 132 005a 7047 bx lr 133 .cfi_endproc 134 .LFE134: 136 .section .text.HAL_IWDG_Refresh,"ax",%progbits 137 .align 1 138 .global HAL_IWDG_Refresh 139 .syntax unified 140 .thumb 141 .thumb_func 143 HAL_IWDG_Refresh: 144 .LVL6: 145 .LFB135: 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @} 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** @addtogroup IWDG_Exported_Functions_Group2 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief IO operation functions 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @verbatim 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** =============================================================================== 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** ##### IO operation functions ##### 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** =============================================================================== 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** [..] This section provides functions allowing to: 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** (+) Refresh the IWDG. 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** @endverbatim 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @{ 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /** 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @brief Refresh the IWDG. 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * the configuration information for the specified IWDG module. 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** * @retval HAL status 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** */ 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** { 146 .loc 1 239 1 is_stmt 1 view -0 147 .cfi_startproc 148 @ args = 0, pretend = 0, frame = 0 149 @ frame_needed = 0, uses_anonymous_args = 0 150 @ link register save eliminated. 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Reload IWDG counter with value defined in the reload register */ 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** __HAL_IWDG_RELOAD_COUNTER(hiwdg); 151 .loc 1 241 3 view .LVU42 152 0000 0368 ldr r3, [r0] 153 0002 4AF6AA22 movw r2, #43690 154 0006 1A60 str r2, [r3] 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** /* Return function status */ 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** return HAL_OK; 155 .loc 1 244 3 view .LVU43 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c **** } ARM GAS /tmp/ccFWyvBN.s page 8 156 .loc 1 245 1 is_stmt 0 view .LVU44 157 0008 0020 movs r0, #0 158 .LVL7: 159 .loc 1 245 1 view .LVU45 160 000a 7047 bx lr 161 .cfi_endproc 162 .LFE135: 164 .text 165 .Letext0: 166 .file 2 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/machine/_defaul 167 .file 3 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/sys/_stdint.h" 168 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h" 169 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 170 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h" 171 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/ccFWyvBN.s page 9 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_iwdg.c /tmp/ccFWyvBN.s:20 .text.HAL_IWDG_Init:0000000000000000 $t /tmp/ccFWyvBN.s:26 .text.HAL_IWDG_Init:0000000000000000 HAL_IWDG_Init /tmp/ccFWyvBN.s:137 .text.HAL_IWDG_Refresh:0000000000000000 $t /tmp/ccFWyvBN.s:143 .text.HAL_IWDG_Refresh:0000000000000000 HAL_IWDG_Refresh UNDEFINED SYMBOLS HAL_GetTick