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stm32f4_makefile/build/stm32f4xx_hal_pwr_ex.lst
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ARM GAS /tmp/ccBSoraS.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "stm32f4xx_hal_pwr_ex.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .section .text.HAL_PWREx_EnableBkUpReg,"ax",%progbits
20 .align 1
21 .global HAL_PWREx_EnableBkUpReg
22 .syntax unified
23 .thumb
24 .thumb_func
26 HAL_PWREx_EnableBkUpReg:
27 .LFB134:
28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c"
1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @file stm32f4xx_hal_pwr_ex.c
4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @author MCD Application Team
5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * functionalities of PWR extension peripheral:
8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * + Peripheral Extended features functions
9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @attention
12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * Copyright (c) 2017 STMicroelectronics.
14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * All rights reserved.
15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in
17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the root directory of this software component.
18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ******************************************************************************
20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #include "stm32f4xx_hal.h"
24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup STM32F4xx_HAL_Driver
26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief PWR HAL module driver
ARM GAS /tmp/ccBSoraS.s page 2
31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @addtogroup PWREx_Private_Constants
39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000U
42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000U
43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_BKPREG_TIMEOUT_VALUE 1000U
44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #define PWR_VOSRDY_TIMEOUT_VALUE 1000U
45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @}
47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Private functions ---------------------------------------------------------*/
54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions
59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Peripheral Extended features functions
60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *
61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @verbatim
62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ===============================================================================
64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ##### Peripheral extended features functions #####
65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ===============================================================================
66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Main and Backup Regulators configuration ***
68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** ================================================
69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from
71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is
72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** retained even in Standby or VBAT mode when the low power backup regulator
73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is enabled. It can be considered as an internal EEPROM when VBAT is
74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** always present. You can use the HAL_PWREx_EnableBkUpReg() function to
75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** enable the low power backup regulator.
76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) When the backup domain is supplied by VDD (analog switch connected to VDD)
78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the backup SRAM is powered from VDD which replaces the VBAT power supply to
79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** save battery life.
80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The backup SRAM is not mass erased by a tamper event. It is read
82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** protected to prevent confidential data, such as cryptographic private
83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** key, from being accessed. The backup SRAM can be erased only through
84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the Flash interface when a protection level change from level 1 to
85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** level 0 is requested.
86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash
87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** programming manual.
ARM GAS /tmp/ccBSoraS.s page 3
88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between
90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** performance and power consumption when the device does not operate at
91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG()
92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** macro which configure VOS bit in PWR_CR register
93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the product datasheets for more details.
95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** FLASH Power Down configuration ****
97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =======================================
98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) By setting the FPDS bit in the PWR_CR register by using the
100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power
101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** down mode when the device enters Stop mode. When the Flash memory
102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is in power down mode, an additional startup delay is incurred when
103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** waking up from Stop mode.
104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, the scale can be modified only when
106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** is OFF and the HSI or HSE clock source is selected as system clock.
107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** The new value programmed is active only when the PLL is ON.
108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** When the PLL is OFF, the voltage scale 3 is automatically selected.
109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** Refer to the datasheets for more details.
110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *** Over-Drive and Under-Drive configuration ****
112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** =================================================
113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** [..]
114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Run mode: the main regulator has
115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** 2 operating modes available:
116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: The CPU and core logic operate at maximum frequency at a given
117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** voltage scaling (scale 1, scale 2 or scale 3)
118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a
119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** higher frequency than the normal mode for a given voltage scaling (scale 1,
120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function
121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mod
122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** the sequence described in Reference manual.
123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (+) For STM32F42xxx/43xxx/446xx/469xx/479xx Devices, in Stop mode: the main regulator or low
125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** supplies a low power voltage to the 1.2V domain, thus preserving the content of register
126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** and internal SRAM. 2 operating modes are available:
127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only
128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is used in Scale 3 or
129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** low voltage mode.
130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is
131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** available when the main regulator or the low power regulator is in low voltage mode.
132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** @endverbatim
134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @{
135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Backup Regulator.
139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status
140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void)
142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
29 .loc 1 142 1 view -0
30 .cfi_startproc
ARM GAS /tmp/ccBSoraS.s page 4
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 10B5 push {r4, lr}
34 .LCFI0:
35 .cfi_def_cfa_offset 8
36 .cfi_offset 4, -8
37 .cfi_offset 14, -4
143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
38 .loc 1 143 3 view .LVU1
39 .LVL0:
144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE;
40 .loc 1 145 3 view .LVU2
41 .loc 1 145 33 is_stmt 0 view .LVU3
42 0002 0B4B ldr r3, .L8
43 0004 0122 movs r2, #1
44 0006 C3F8A420 str r2, [r3, #164]
146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */
148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
45 .loc 1 148 3 is_stmt 1 view .LVU4
46 .loc 1 148 15 is_stmt 0 view .LVU5
47 000a FFF7FEFF bl HAL_GetTick
48 .LVL1:
49 000e 0446 mov r4, r0
50 .LVL2:
149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
51 .loc 1 151 3 is_stmt 1 view .LVU6
52 .L2:
53 .loc 1 151 8 view .LVU7
54 .loc 1 151 9 is_stmt 0 view .LVU8
55 0010 084B ldr r3, .L8+4
56 0012 5B68 ldr r3, [r3, #4]
57 .loc 1 151 8 view .LVU9
58 0014 13F0080F tst r3, #8
59 0018 07D1 bne .L7
152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
60 .loc 1 153 5 is_stmt 1 view .LVU10
61 .loc 1 153 9 is_stmt 0 view .LVU11
62 001a FFF7FEFF bl HAL_GetTick
63 .LVL3:
64 .loc 1 153 23 view .LVU12
65 001e 001B subs r0, r0, r4
66 .loc 1 153 7 view .LVU13
67 0020 B0F57A7F cmp r0, #1000
68 0024 F4D9 bls .L2
154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
69 .loc 1 155 14 view .LVU14
70 0026 0320 movs r0, #3
71 0028 00E0 b .L3
72 .L7:
156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
ARM GAS /tmp/ccBSoraS.s page 5
158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
73 .loc 1 158 10 view .LVU15
74 002a 0020 movs r0, #0
75 .L3:
159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
76 .loc 1 159 1 view .LVU16
77 002c 10BD pop {r4, pc}
78 .LVL4:
79 .L9:
80 .loc 1 159 1 view .LVU17
81 002e 00BF .align 2
82 .L8:
83 0030 00000E42 .word 1108213760
84 0034 00700040 .word 1073770496
85 .cfi_endproc
86 .LFE134:
88 .section .text.HAL_PWREx_DisableBkUpReg,"ax",%progbits
89 .align 1
90 .global HAL_PWREx_DisableBkUpReg
91 .syntax unified
92 .thumb
93 .thumb_func
95 HAL_PWREx_DisableBkUpReg:
96 .LFB135:
160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Backup Regulator.
163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL status
164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void)
166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
97 .loc 1 166 1 is_stmt 1 view -0
98 .cfi_startproc
99 @ args = 0, pretend = 0, frame = 0
100 @ frame_needed = 0, uses_anonymous_args = 0
101 0000 10B5 push {r4, lr}
102 .LCFI1:
103 .cfi_def_cfa_offset 8
104 .cfi_offset 4, -8
105 .cfi_offset 14, -4
167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
106 .loc 1 167 3 view .LVU19
107 .LVL5:
168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE;
108 .loc 1 169 3 view .LVU20
109 .loc 1 169 33 is_stmt 0 view .LVU21
110 0002 0B4B ldr r3, .L17
111 0004 0022 movs r2, #0
112 0006 C3F8A420 str r2, [r3, #164]
170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get tick */
172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
113 .loc 1 172 3 is_stmt 1 view .LVU22
114 .loc 1 172 15 is_stmt 0 view .LVU23
115 000a FFF7FEFF bl HAL_GetTick
116 .LVL6:
ARM GAS /tmp/ccBSoraS.s page 6
117 000e 0446 mov r4, r0
118 .LVL7:
173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Wait till Backup regulator ready flag is set */
175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET)
119 .loc 1 175 3 is_stmt 1 view .LVU24
120 .L11:
121 .loc 1 175 8 view .LVU25
122 .loc 1 175 9 is_stmt 0 view .LVU26
123 0010 084B ldr r3, .L17+4
124 0012 5B68 ldr r3, [r3, #4]
125 .loc 1 175 8 view .LVU27
126 0014 13F0080F tst r3, #8
127 0018 07D0 beq .L16
176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE)
128 .loc 1 177 5 is_stmt 1 view .LVU28
129 .loc 1 177 9 is_stmt 0 view .LVU29
130 001a FFF7FEFF bl HAL_GetTick
131 .LVL8:
132 .loc 1 177 23 view .LVU30
133 001e 001B subs r0, r0, r4
134 .loc 1 177 7 view .LVU31
135 0020 B0F57A7F cmp r0, #1000
136 0024 F4D9 bls .L11
178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
137 .loc 1 179 14 view .LVU32
138 0026 0320 movs r0, #3
139 0028 00E0 b .L12
140 .L16:
180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
141 .loc 1 182 10 view .LVU33
142 002a 0020 movs r0, #0
143 .L12:
183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
144 .loc 1 183 1 view .LVU34
145 002c 10BD pop {r4, pc}
146 .LVL9:
147 .L18:
148 .loc 1 183 1 view .LVU35
149 002e 00BF .align 2
150 .L17:
151 0030 00000E42 .word 1108213760
152 0034 00700040 .word 1073770496
153 .cfi_endproc
154 .LFE135:
156 .section .text.HAL_PWREx_EnableFlashPowerDown,"ax",%progbits
157 .align 1
158 .global HAL_PWREx_EnableFlashPowerDown
159 .syntax unified
160 .thumb
161 .thumb_func
163 HAL_PWREx_EnableFlashPowerDown:
164 .LFB136:
ARM GAS /tmp/ccBSoraS.s page 7
184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Enables the Flash Power Down in Stop mode.
187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None
188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_EnableFlashPowerDown(void)
190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
165 .loc 1 190 1 is_stmt 1 view -0
166 .cfi_startproc
167 @ args = 0, pretend = 0, frame = 0
168 @ frame_needed = 0, uses_anonymous_args = 0
169 @ link register save eliminated.
191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE;
170 .loc 1 191 3 view .LVU37
171 .loc 1 191 33 is_stmt 0 view .LVU38
172 0000 014B ldr r3, .L20
173 0002 0122 movs r2, #1
174 0004 5A62 str r2, [r3, #36]
192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
175 .loc 1 192 1 view .LVU39
176 0006 7047 bx lr
177 .L21:
178 .align 2
179 .L20:
180 0008 00000E42 .word 1108213760
181 .cfi_endproc
182 .LFE136:
184 .section .text.HAL_PWREx_DisableFlashPowerDown,"ax",%progbits
185 .align 1
186 .global HAL_PWREx_DisableFlashPowerDown
187 .syntax unified
188 .thumb
189 .thumb_func
191 HAL_PWREx_DisableFlashPowerDown:
192 .LFB137:
193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode.
196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval None
197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** void HAL_PWREx_DisableFlashPowerDown(void)
199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
193 .loc 1 199 1 is_stmt 1 view -0
194 .cfi_startproc
195 @ args = 0, pretend = 0, frame = 0
196 @ frame_needed = 0, uses_anonymous_args = 0
197 @ link register save eliminated.
200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE;
198 .loc 1 200 3 view .LVU41
199 .loc 1 200 33 is_stmt 0 view .LVU42
200 0000 014B ldr r3, .L23
201 0002 0022 movs r2, #0
202 0004 5A62 str r2, [r3, #36]
201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
203 .loc 1 201 1 view .LVU43
204 0006 7047 bx lr
205 .L24:
ARM GAS /tmp/ccBSoraS.s page 8
206 .align 2
207 .L23:
208 0008 00000E42 .word 1108213760
209 .cfi_endproc
210 .LFE137:
212 .section .text.HAL_PWREx_GetVoltageRange,"ax",%progbits
213 .align 1
214 .global HAL_PWREx_GetVoltageRange
215 .syntax unified
216 .thumb
217 .thumb_func
219 HAL_PWREx_GetVoltageRange:
220 .LFB138:
202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Return Voltage Scaling Range.
205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval The configured scale for the regulator voltage(VOS bit field).
206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * The returned value can be one of the following:
207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t HAL_PWREx_GetVoltageRange(void)
212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
221 .loc 1 212 1 is_stmt 1 view -0
222 .cfi_startproc
223 @ args = 0, pretend = 0, frame = 0
224 @ frame_needed = 0, uses_anonymous_args = 0
225 @ link register save eliminated.
213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return (PWR->CR & PWR_CR_VOS);
226 .loc 1 213 3 view .LVU45
227 .loc 1 213 14 is_stmt 0 view .LVU46
228 0000 024B ldr r3, .L26
229 0002 1868 ldr r0, [r3]
214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
230 .loc 1 214 1 view .LVU47
231 0004 00F48040 and r0, r0, #16384
232 0008 7047 bx lr
233 .L27:
234 000a 00BF .align 2
235 .L26:
236 000c 00700040 .word 1073770496
237 .cfi_endproc
238 .LFE138:
240 .section .text.HAL_PWREx_ControlVoltageScaling,"ax",%progbits
241 .align 1
242 .global HAL_PWREx_ControlVoltageScaling
243 .syntax unified
244 .thumb
245 .thumb_func
247 HAL_PWREx_ControlVoltageScaling:
248 .LVL10:
249 .LFB139:
215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /**
218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage.
ARM GAS /tmp/ccBSoraS.s page 9
219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve
220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption.
221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 168 MHz.
224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * the maximum value of fHCLK = 144 MHz.
226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @note When moving from Range 1 to Range 2, the system frequency must be decreased to
227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API.
228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * When moving from Range 2 to Range 1, the system frequency can be increased to
229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API.
230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** * @retval HAL Status
231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** */
232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling)
233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
250 .loc 1 233 1 is_stmt 1 view -0
251 .cfi_startproc
252 @ args = 0, pretend = 0, frame = 8
253 @ frame_needed = 0, uses_anonymous_args = 0
254 .loc 1 233 1 is_stmt 0 view .LVU49
255 0000 10B5 push {r4, lr}
256 .LCFI2:
257 .cfi_def_cfa_offset 8
258 .cfi_offset 4, -8
259 .cfi_offset 14, -4
260 0002 82B0 sub sp, sp, #8
261 .LCFI3:
262 .cfi_def_cfa_offset 16
234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** uint32_t tickstart = 0U;
263 .loc 1 234 3 is_stmt 1 view .LVU50
264 .LVL11:
235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling));
265 .loc 1 236 3 view .LVU51
237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Enable PWR RCC Clock Peripheral */
239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
266 .loc 1 239 3 view .LVU52
267 .LBB2:
268 .loc 1 239 3 view .LVU53
269 0004 0024 movs r4, #0
270 0006 0094 str r4, [sp]
271 .loc 1 239 3 view .LVU54
272 0008 144A ldr r2, .L35
273 000a 116C ldr r1, [r2, #64]
274 000c 41F08051 orr r1, r1, #268435456
275 0010 1164 str r1, [r2, #64]
276 .loc 1 239 3 view .LVU55
277 0012 126C ldr r2, [r2, #64]
278 0014 02F08052 and r2, r2, #268435456
279 0018 0092 str r2, [sp]
280 .loc 1 239 3 view .LVU56
281 001a 009B ldr r3, [sp]
282 .LBE2:
283 .loc 1 239 3 view .LVU57
240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Set Range */
ARM GAS /tmp/ccBSoraS.s page 10
242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling);
284 .loc 1 242 3 view .LVU58
285 .LBB3:
286 .loc 1 242 3 view .LVU59
287 001c 0194 str r4, [sp, #4]
288 .loc 1 242 3 view .LVU60
289 001e 104A ldr r2, .L35+4
290 0020 1368 ldr r3, [r2]
291 0022 23F48043 bic r3, r3, #16384
292 0026 0343 orrs r3, r3, r0
293 0028 1360 str r3, [r2]
294 .loc 1 242 3 view .LVU61
295 002a 1368 ldr r3, [r2]
296 002c 03F48043 and r3, r3, #16384
297 0030 0193 str r3, [sp, #4]
298 .loc 1 242 3 view .LVU62
299 0032 019B ldr r3, [sp, #4]
300 .LBE3:
301 .loc 1 242 3 view .LVU63
243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** /* Get Start Tick*/
245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
302 .loc 1 245 3 view .LVU64
303 .loc 1 245 15 is_stmt 0 view .LVU65
304 0034 FFF7FEFF bl HAL_GetTick
305 .LVL12:
306 .loc 1 245 15 view .LVU66
307 0038 0446 mov r4, r0
308 .LVL13:
246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET))
309 .loc 1 246 3 is_stmt 1 view .LVU67
310 .L29:
311 .loc 1 246 8 view .LVU68
312 .loc 1 246 10 is_stmt 0 view .LVU69
313 003a 094B ldr r3, .L35+4
314 003c 5B68 ldr r3, [r3, #4]
315 .loc 1 246 8 view .LVU70
316 003e 13F4804F tst r3, #16384
317 0042 07D1 bne .L34
247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE)
318 .loc 1 248 5 is_stmt 1 view .LVU71
319 .loc 1 248 9 is_stmt 0 view .LVU72
320 0044 FFF7FEFF bl HAL_GetTick
321 .LVL14:
322 .loc 1 248 23 view .LVU73
323 0048 001B subs r0, r0, r4
324 .loc 1 248 7 view .LVU74
325 004a B0F57A7F cmp r0, #1000
326 004e F4D9 bls .L29
249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** {
250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
327 .loc 1 250 14 view .LVU75
328 0050 0320 movs r0, #3
329 0052 00E0 b .L30
330 .L34:
251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
ARM GAS /tmp/ccBSoraS.s page 11
252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c ****
254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** return HAL_OK;
331 .loc 1 254 10 view .LVU76
332 0054 0020 movs r0, #0
333 .L30:
255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c **** }
334 .loc 1 255 1 view .LVU77
335 0056 02B0 add sp, sp, #8
336 .LCFI4:
337 .cfi_def_cfa_offset 8
338 @ sp needed
339 0058 10BD pop {r4, pc}
340 .LVL15:
341 .L36:
342 .loc 1 255 1 view .LVU78
343 005a 00BF .align 2
344 .L35:
345 005c 00380240 .word 1073887232
346 0060 00700040 .word 1073770496
347 .cfi_endproc
348 .LFE139:
350 .text
351 .Letext0:
352 .file 2 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/machine/_defaul
353 .file 3 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/sys/_stdint.h"
354 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
355 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h"
356 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
357 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
ARM GAS /tmp/ccBSoraS.s page 12
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f4xx_hal_pwr_ex.c
/tmp/ccBSoraS.s:20 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 $t
/tmp/ccBSoraS.s:26 .text.HAL_PWREx_EnableBkUpReg:0000000000000000 HAL_PWREx_EnableBkUpReg
/tmp/ccBSoraS.s:83 .text.HAL_PWREx_EnableBkUpReg:0000000000000030 $d
/tmp/ccBSoraS.s:89 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 $t
/tmp/ccBSoraS.s:95 .text.HAL_PWREx_DisableBkUpReg:0000000000000000 HAL_PWREx_DisableBkUpReg
/tmp/ccBSoraS.s:151 .text.HAL_PWREx_DisableBkUpReg:0000000000000030 $d
/tmp/ccBSoraS.s:157 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 $t
/tmp/ccBSoraS.s:163 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000000 HAL_PWREx_EnableFlashPowerDown
/tmp/ccBSoraS.s:180 .text.HAL_PWREx_EnableFlashPowerDown:0000000000000008 $d
/tmp/ccBSoraS.s:185 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 $t
/tmp/ccBSoraS.s:191 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000000 HAL_PWREx_DisableFlashPowerDown
/tmp/ccBSoraS.s:208 .text.HAL_PWREx_DisableFlashPowerDown:0000000000000008 $d
/tmp/ccBSoraS.s:213 .text.HAL_PWREx_GetVoltageRange:0000000000000000 $t
/tmp/ccBSoraS.s:219 .text.HAL_PWREx_GetVoltageRange:0000000000000000 HAL_PWREx_GetVoltageRange
/tmp/ccBSoraS.s:236 .text.HAL_PWREx_GetVoltageRange:000000000000000c $d
/tmp/ccBSoraS.s:241 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 $t
/tmp/ccBSoraS.s:247 .text.HAL_PWREx_ControlVoltageScaling:0000000000000000 HAL_PWREx_ControlVoltageScaling
/tmp/ccBSoraS.s:345 .text.HAL_PWREx_ControlVoltageScaling:000000000000005c $d
UNDEFINED SYMBOLS
HAL_GetTick