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stm32f4_makefile/build/tim.lst
2025-06-25 11:12:35 +08:00

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ARM GAS /tmp/cctYDink.s page 1
1 .cpu cortex-m4
2 .arch armv7e-m
3 .fpu fpv4-sp-d16
4 .eabi_attribute 27, 1
5 .eabi_attribute 28, 1
6 .eabi_attribute 20, 1
7 .eabi_attribute 21, 1
8 .eabi_attribute 23, 3
9 .eabi_attribute 24, 1
10 .eabi_attribute 25, 1
11 .eabi_attribute 26, 1
12 .eabi_attribute 30, 1
13 .eabi_attribute 34, 1
14 .eabi_attribute 18, 4
15 .file "tim.c"
16 .text
17 .Ltext0:
18 .cfi_sections .debug_frame
19 .section .text.MX_TIM13_Init,"ax",%progbits
20 .align 1
21 .global MX_TIM13_Init
22 .syntax unified
23 .thumb
24 .thumb_func
26 MX_TIM13_Init:
27 .LFB134:
28 .file 1 "Src/tim.c"
1:Src/tim.c **** /* USER CODE BEGIN Header */
2:Src/tim.c **** /**
3:Src/tim.c **** ******************************************************************************
4:Src/tim.c **** * @file tim.c
5:Src/tim.c **** * @brief This file provides code for the configuration
6:Src/tim.c **** * of the TIM instances.
7:Src/tim.c **** ******************************************************************************
8:Src/tim.c **** * @attention
9:Src/tim.c **** *
10:Src/tim.c **** * Copyright (c) 2025 STMicroelectronics.
11:Src/tim.c **** * All rights reserved.
12:Src/tim.c **** *
13:Src/tim.c **** * This software is licensed under terms that can be found in the LICENSE file
14:Src/tim.c **** * in the root directory of this software component.
15:Src/tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
16:Src/tim.c **** *
17:Src/tim.c **** ******************************************************************************
18:Src/tim.c **** */
19:Src/tim.c **** /* USER CODE END Header */
20:Src/tim.c **** /* Includes ------------------------------------------------------------------*/
21:Src/tim.c **** #include "tim.h"
22:Src/tim.c ****
23:Src/tim.c **** /* USER CODE BEGIN 0 */
24:Src/tim.c ****
25:Src/tim.c **** /* USER CODE END 0 */
26:Src/tim.c ****
27:Src/tim.c **** TIM_HandleTypeDef htim13;
28:Src/tim.c ****
29:Src/tim.c **** /* TIM13 init function */
30:Src/tim.c **** void MX_TIM13_Init(void)
ARM GAS /tmp/cctYDink.s page 2
31:Src/tim.c **** {
29 .loc 1 31 1 view -0
30 .cfi_startproc
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 0000 08B5 push {r3, lr}
34 .LCFI0:
35 .cfi_def_cfa_offset 8
36 .cfi_offset 3, -8
37 .cfi_offset 14, -4
32:Src/tim.c ****
33:Src/tim.c **** /* USER CODE BEGIN TIM13_Init 0 */
34:Src/tim.c ****
35:Src/tim.c **** /* USER CODE END TIM13_Init 0 */
36:Src/tim.c ****
37:Src/tim.c **** /* USER CODE BEGIN TIM13_Init 1 */
38:Src/tim.c ****
39:Src/tim.c **** /* USER CODE END TIM13_Init 1 */
40:Src/tim.c **** htim13.Instance = TIM13;
38 .loc 1 40 3 view .LVU1
39 .loc 1 40 19 is_stmt 0 view .LVU2
40 0002 0948 ldr r0, .L5
41 0004 094B ldr r3, .L5+4
42 0006 0360 str r3, [r0]
41:Src/tim.c **** htim13.Init.Prescaler = 0;
43 .loc 1 41 3 is_stmt 1 view .LVU3
44 .loc 1 41 25 is_stmt 0 view .LVU4
45 0008 0023 movs r3, #0
46 000a 4360 str r3, [r0, #4]
42:Src/tim.c **** htim13.Init.CounterMode = TIM_COUNTERMODE_UP;
47 .loc 1 42 3 is_stmt 1 view .LVU5
48 .loc 1 42 27 is_stmt 0 view .LVU6
49 000c 8360 str r3, [r0, #8]
43:Src/tim.c **** htim13.Init.Period = 65535;
50 .loc 1 43 3 is_stmt 1 view .LVU7
51 .loc 1 43 22 is_stmt 0 view .LVU8
52 000e 4FF6FF72 movw r2, #65535
53 0012 C260 str r2, [r0, #12]
44:Src/tim.c **** htim13.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
54 .loc 1 44 3 is_stmt 1 view .LVU9
55 .loc 1 44 29 is_stmt 0 view .LVU10
56 0014 0361 str r3, [r0, #16]
45:Src/tim.c **** htim13.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
57 .loc 1 45 3 is_stmt 1 view .LVU11
58 .loc 1 45 33 is_stmt 0 view .LVU12
59 0016 8361 str r3, [r0, #24]
46:Src/tim.c **** if (HAL_TIM_Base_Init(&htim13) != HAL_OK)
60 .loc 1 46 3 is_stmt 1 view .LVU13
61 .loc 1 46 7 is_stmt 0 view .LVU14
62 0018 FFF7FEFF bl HAL_TIM_Base_Init
63 .LVL0:
64 .loc 1 46 6 view .LVU15
65 001c 00B9 cbnz r0, .L4
66 .L1:
47:Src/tim.c **** {
48:Src/tim.c **** Error_Handler();
49:Src/tim.c **** }
ARM GAS /tmp/cctYDink.s page 3
50:Src/tim.c **** /* USER CODE BEGIN TIM13_Init 2 */
51:Src/tim.c ****
52:Src/tim.c **** /* USER CODE END TIM13_Init 2 */
53:Src/tim.c ****
54:Src/tim.c **** }
67 .loc 1 54 1 view .LVU16
68 001e 08BD pop {r3, pc}
69 .L4:
48:Src/tim.c **** }
70 .loc 1 48 5 is_stmt 1 view .LVU17
71 0020 FFF7FEFF bl Error_Handler
72 .LVL1:
73 .loc 1 54 1 is_stmt 0 view .LVU18
74 0024 FBE7 b .L1
75 .L6:
76 0026 00BF .align 2
77 .L5:
78 0028 00000000 .word .LANCHOR0
79 002c 001C0040 .word 1073748992
80 .cfi_endproc
81 .LFE134:
83 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
84 .align 1
85 .global HAL_TIM_Base_MspInit
86 .syntax unified
87 .thumb
88 .thumb_func
90 HAL_TIM_Base_MspInit:
91 .LVL2:
92 .LFB135:
55:Src/tim.c ****
56:Src/tim.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
57:Src/tim.c **** {
93 .loc 1 57 1 is_stmt 1 view -0
94 .cfi_startproc
95 @ args = 0, pretend = 0, frame = 8
96 @ frame_needed = 0, uses_anonymous_args = 0
97 @ link register save eliminated.
58:Src/tim.c ****
59:Src/tim.c **** if(tim_baseHandle->Instance==TIM13)
98 .loc 1 59 3 view .LVU20
99 .loc 1 59 20 is_stmt 0 view .LVU21
100 0000 0268 ldr r2, [r0]
101 .loc 1 59 5 view .LVU22
102 0002 094B ldr r3, .L14
103 0004 9A42 cmp r2, r3
104 0006 00D0 beq .L13
105 0008 7047 bx lr
106 .L13:
57:Src/tim.c ****
107 .loc 1 57 1 view .LVU23
108 000a 82B0 sub sp, sp, #8
109 .LCFI1:
110 .cfi_def_cfa_offset 8
60:Src/tim.c **** {
61:Src/tim.c **** /* USER CODE BEGIN TIM13_MspInit 0 */
62:Src/tim.c ****
ARM GAS /tmp/cctYDink.s page 4
63:Src/tim.c **** /* USER CODE END TIM13_MspInit 0 */
64:Src/tim.c **** /* TIM13 clock enable */
65:Src/tim.c **** __HAL_RCC_TIM13_CLK_ENABLE();
111 .loc 1 65 5 is_stmt 1 view .LVU24
112 .LBB2:
113 .loc 1 65 5 view .LVU25
114 000c 0023 movs r3, #0
115 000e 0193 str r3, [sp, #4]
116 .loc 1 65 5 view .LVU26
117 0010 064B ldr r3, .L14+4
118 0012 1A6C ldr r2, [r3, #64]
119 0014 42F08002 orr r2, r2, #128
120 0018 1A64 str r2, [r3, #64]
121 .loc 1 65 5 view .LVU27
122 001a 1B6C ldr r3, [r3, #64]
123 001c 03F08003 and r3, r3, #128
124 0020 0193 str r3, [sp, #4]
125 .loc 1 65 5 view .LVU28
126 0022 019B ldr r3, [sp, #4]
127 .LBE2:
128 .loc 1 65 5 view .LVU29
66:Src/tim.c **** /* USER CODE BEGIN TIM13_MspInit 1 */
67:Src/tim.c ****
68:Src/tim.c **** /* USER CODE END TIM13_MspInit 1 */
69:Src/tim.c **** }
70:Src/tim.c **** }
129 .loc 1 70 1 is_stmt 0 view .LVU30
130 0024 02B0 add sp, sp, #8
131 .LCFI2:
132 .cfi_def_cfa_offset 0
133 @ sp needed
134 0026 7047 bx lr
135 .L15:
136 .align 2
137 .L14:
138 0028 001C0040 .word 1073748992
139 002c 00380240 .word 1073887232
140 .cfi_endproc
141 .LFE135:
143 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
144 .align 1
145 .global HAL_TIM_Base_MspDeInit
146 .syntax unified
147 .thumb
148 .thumb_func
150 HAL_TIM_Base_MspDeInit:
151 .LVL3:
152 .LFB136:
71:Src/tim.c ****
72:Src/tim.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
73:Src/tim.c **** {
153 .loc 1 73 1 is_stmt 1 view -0
154 .cfi_startproc
155 @ args = 0, pretend = 0, frame = 0
156 @ frame_needed = 0, uses_anonymous_args = 0
157 @ link register save eliminated.
74:Src/tim.c ****
ARM GAS /tmp/cctYDink.s page 5
75:Src/tim.c **** if(tim_baseHandle->Instance==TIM13)
158 .loc 1 75 3 view .LVU32
159 .loc 1 75 20 is_stmt 0 view .LVU33
160 0000 0268 ldr r2, [r0]
161 .loc 1 75 5 view .LVU34
162 0002 054B ldr r3, .L19
163 0004 9A42 cmp r2, r3
164 0006 00D0 beq .L18
165 .L16:
76:Src/tim.c **** {
77:Src/tim.c **** /* USER CODE BEGIN TIM13_MspDeInit 0 */
78:Src/tim.c ****
79:Src/tim.c **** /* USER CODE END TIM13_MspDeInit 0 */
80:Src/tim.c **** /* Peripheral clock disable */
81:Src/tim.c **** __HAL_RCC_TIM13_CLK_DISABLE();
82:Src/tim.c **** /* USER CODE BEGIN TIM13_MspDeInit 1 */
83:Src/tim.c ****
84:Src/tim.c **** /* USER CODE END TIM13_MspDeInit 1 */
85:Src/tim.c **** }
86:Src/tim.c **** }
166 .loc 1 86 1 view .LVU35
167 0008 7047 bx lr
168 .L18:
81:Src/tim.c **** /* USER CODE BEGIN TIM13_MspDeInit 1 */
169 .loc 1 81 5 is_stmt 1 view .LVU36
170 000a 044A ldr r2, .L19+4
171 000c 136C ldr r3, [r2, #64]
172 000e 23F08003 bic r3, r3, #128
173 0012 1364 str r3, [r2, #64]
174 .loc 1 86 1 is_stmt 0 view .LVU37
175 0014 F8E7 b .L16
176 .L20:
177 0016 00BF .align 2
178 .L19:
179 0018 001C0040 .word 1073748992
180 001c 00380240 .word 1073887232
181 .cfi_endproc
182 .LFE136:
184 .global htim13
185 .section .bss.htim13,"aw",%nobits
186 .align 2
187 .set .LANCHOR0,. + 0
190 htim13:
191 0000 00000000 .space 72
191 00000000
191 00000000
191 00000000
191 00000000
192 .text
193 .Letext0:
194 .file 2 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/machine/_defaul
195 .file 3 "/home/jfen/toolchain/gcc-arm-none-eabi-10.3-2021.10/arm-none-eabi/include/sys/_stdint.h"
196 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h"
197 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
198 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
199 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim.h"
200 .file 8 "Inc/main.h"
ARM GAS /tmp/cctYDink.s page 6
201 .file 9 "Inc/tim.h"
ARM GAS /tmp/cctYDink.s page 7
DEFINED SYMBOLS
*ABS*:0000000000000000 tim.c
/tmp/cctYDink.s:20 .text.MX_TIM13_Init:0000000000000000 $t
/tmp/cctYDink.s:26 .text.MX_TIM13_Init:0000000000000000 MX_TIM13_Init
/tmp/cctYDink.s:78 .text.MX_TIM13_Init:0000000000000028 $d
/tmp/cctYDink.s:84 .text.HAL_TIM_Base_MspInit:0000000000000000 $t
/tmp/cctYDink.s:90 .text.HAL_TIM_Base_MspInit:0000000000000000 HAL_TIM_Base_MspInit
/tmp/cctYDink.s:138 .text.HAL_TIM_Base_MspInit:0000000000000028 $d
/tmp/cctYDink.s:144 .text.HAL_TIM_Base_MspDeInit:0000000000000000 $t
/tmp/cctYDink.s:150 .text.HAL_TIM_Base_MspDeInit:0000000000000000 HAL_TIM_Base_MspDeInit
/tmp/cctYDink.s:179 .text.HAL_TIM_Base_MspDeInit:0000000000000018 $d
/tmp/cctYDink.s:190 .bss.htim13:0000000000000000 htim13
/tmp/cctYDink.s:186 .bss.htim13:0000000000000000 $d
UNDEFINED SYMBOLS
HAL_TIM_Base_Init
Error_Handler