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120
RT_Thread/libcpu/aarch64/common/up/context_gcc.S
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120
RT_Thread/libcpu/aarch64/common/up/context_gcc.S
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-05-18 Jesven the first version
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* 2023-06-24 Shell Support backtrace for user thread
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* 2024-01-06 Shell Fix barrier on irq_disable/enable
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* 2024-03-28 Shell Move vector handling codes from context_gcc.S
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*/
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#ifndef __ASSEMBLY__
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#define __ASSEMBLY__
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#endif
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#include "context_gcc.h"
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#include "../include/vector_gcc.h"
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#include <rtconfig.h>
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#include <asm-generic.h>
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#include <asm-fpu.h>
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#include <armv8.h>
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/**
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* Context switch status
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*/
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.section .bss
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rt_interrupt_from_thread:
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.quad 0
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rt_interrupt_to_thread:
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.quad 0
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rt_thread_switch_interrupt_flag:
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.quad 0
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.section .text
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/*
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* void rt_hw_context_switch_to(rt_ubase_t to);
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* X0 --> to sp
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*/
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.globl rt_hw_context_switch_to
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rt_hw_context_switch_to:
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clrex
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ldr x0, [x0]
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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/*
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* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
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* X0 --> from sp
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* X1 --> to sp
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* X2 --> to thread
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*/
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.globl rt_hw_context_switch
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rt_hw_context_switch:
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clrex
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SAVE_CONTEXT_SWITCH x19, x20
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mov x2, sp
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str x2, [x0] // store sp in preempted tasks TCB
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ldr x0, [x1] // get new task stack pointer
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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.globl rt_thread_switch_interrupt_flag
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch_interrupt
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/*
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* void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t from_thread, rt_thread_t to_thread);
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*/
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rt_hw_context_switch_interrupt:
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ldr x6, =rt_thread_switch_interrupt_flag
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ldr x7, [x6]
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cmp x7, #1
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b.eq _reswitch
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/* set rt_interrupt_from_thread */
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ldr x4, =rt_interrupt_from_thread
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str x0, [x4]
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/* set rt_thread_switch_interrupt_flag to 1 */
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mov x7, #1
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str x7, [x6]
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stp x1, x30, [sp, #-0x10]!
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#ifdef RT_USING_SMART
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mov x0, x2
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bl lwp_user_setting_save
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#endif
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ldp x1, x30, [sp], #0x10
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_reswitch:
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ldr x6, =rt_interrupt_to_thread // set rt_interrupt_to_thread
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str x1, [x6]
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ret
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.globl rt_hw_context_switch_interrupt_do
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/**
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* rt_hw_context_switch_interrupt_do(void)
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*/
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rt_hw_context_switch_interrupt_do:
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clrex
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SAVE_CONTEXT_SWITCH_FAST
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ldr x3, =rt_interrupt_from_thread
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ldr x4, [x3]
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mov x0, sp
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str x0, [x4] // store sp in preempted tasks's tcb
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ldr x3, =rt_interrupt_to_thread
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ldr x4, [x3]
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ldr x0, [x4] // get new task's stack pointer
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RESTORE_CONTEXT_SWITCH x0
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NEVER_RETURN
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83
RT_Thread/libcpu/aarch64/common/up/context_gcc.h
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RT_Thread/libcpu/aarch64/common/up/context_gcc.h
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/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-03-25 Shell Trimming unecessary ops and
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* improve the performance of ctx switch
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*/
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#ifndef __ARM64_CONTEXT_H__
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#define __ARM64_CONTEXT_H__
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#include "../include/context_gcc.h"
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#include <rtconfig.h>
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#include <asm-generic.h>
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#include <asm-fpu.h>
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#include <armv8.h>
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/* restore address space */
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.macro RESTORE_ADDRESS_SPACE
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#ifdef RT_USING_SMART
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bl rt_thread_self
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mov x19, x0
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bl lwp_aspace_switch
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mov x0, x19
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bl lwp_user_setting_restore
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#endif
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.endm
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.macro RESTORE_CONTEXT_SWITCH using_sp
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/* Set the SP to point to the stack of the task being restored. */
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mov sp, \using_sp
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RESTORE_ADDRESS_SPACE
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_RESTORE_CONTEXT_SWITCH
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.endm
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.macro RESTORE_IRQ_CONTEXT
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#ifdef RT_USING_SMART
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BL rt_thread_self
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MOV X19, X0
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BL lwp_aspace_switch
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MOV X0, X19
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BL lwp_user_setting_restore
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#endif
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LDP X2, X3, [SP], #0x10 /* SPSR and ELR. */
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TST X3, #0x1f
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MSR SPSR_EL1, X3
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MSR ELR_EL1, X2
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LDP X29, X30, [SP], #0x10
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MSR SP_EL0, X29
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LDP X28, X29, [SP], #0x10
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MSR FPCR, X28
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MSR FPSR, X29
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LDP X28, X29, [SP], #0x10
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LDP X26, X27, [SP], #0x10
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LDP X24, X25, [SP], #0x10
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LDP X22, X23, [SP], #0x10
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LDP X20, X21, [SP], #0x10
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LDP X18, X19, [SP], #0x10
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LDP X16, X17, [SP], #0x10
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LDP X14, X15, [SP], #0x10
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LDP X12, X13, [SP], #0x10
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LDP X10, X11, [SP], #0x10
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LDP X8, X9, [SP], #0x10
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LDP X6, X7, [SP], #0x10
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LDP X4, X5, [SP], #0x10
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LDP X2, X3, [SP], #0x10
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LDP X0, X1, [SP], #0x10
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RESTORE_FPU SP
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#ifdef RT_USING_SMART
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BEQ arch_ret_to_user
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#endif
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ERET
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.endm
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#endif /* __ARM64_CONTEXT_H__ */
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61
RT_Thread/libcpu/aarch64/common/up/vector_gcc.S
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61
RT_Thread/libcpu/aarch64/common/up/vector_gcc.S
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@ -0,0 +1,61 @@
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2024-03-28 Shell Move vector handling codes from context_gcc.S
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*/
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#ifndef __ASSEMBLY__
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#define __ASSEMBLY__
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#endif
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#include "../include/vector_gcc.h"
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#include "context_gcc.h"
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#include <rtconfig.h>
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#include <asm-generic.h>
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#include <asm-fpu.h>
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#include <armv8.h>
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.section .text
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vector_fiq:
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.align 8
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.globl vector_fiq
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SAVE_IRQ_CONTEXT
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bl rt_hw_trap_fiq
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b rt_hw_irq_exit
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.globl rt_thread_switch_interrupt_flag
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.globl rt_hw_context_switch_interrupt_do
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/**
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* void rt_hw_vector_irq_sched(void *eframe)
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* @brief do IRQ scheduling
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*/
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rt_hw_vector_irq_sched:
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.globl rt_hw_vector_irq_sched
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.align 8
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/**
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* if rt_thread_switch_interrupt_flag set, jump to
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* rt_hw_context_switch_interrupt_do and don't return
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*/
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ldr x1, =rt_thread_switch_interrupt_flag
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ldr x2, [x1]
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cmp x2, #1
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bne 1f
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/* clear flag */
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mov x2, #0
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str x2, [x1]
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bl rt_hw_context_switch_interrupt_do
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1:
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b rt_hw_irq_exit
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