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360
RT_Thread/libcpu/ti-dsp/c28x/context.s
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360
RT_Thread/libcpu/ti-dsp/c28x/context.s
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;
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; Copyright (c) 2006-2022, RT-Thread Development Team
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;
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; SPDX-License-Identifier: Apache-2.0
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;
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; Change Logs:
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; Date Author Notes
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; 2018-09-01 xuzhuoyi the first version.
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; 2019-06-17 zhaoxiaowei fix bugs of old c28x interrupt api.
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; 2019-07-03 zhaoxiaowei add _rt_hw_calc_csb function to support __rt_ffs.
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; 2019-12-05 xiaolifan add support for hardware fpu32
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; 2022-06-21 guyunjie trim pendsv (RTOSINT_Handler)
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; 2022-08-24 guyunjie fix bugs in context switching
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; 2022-10-15 guyunjie add zero-latency interrupt
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.ref rt_interrupt_to_thread
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.ref rt_interrupt_from_thread
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.ref rt_thread_switch_interrupt_flag
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.def rtosint_handler
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.def rt_hw_get_st0
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.def rt_hw_get_st1
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.def rt_hw_calc_csb
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.def rt_hw_context_switch_interrupt
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.def rt_hw_context_switch
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.def rt_hw_context_switch_to
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.def rt_hw_interrupt_thread_switch
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.def rt_hw_interrupt_disable
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.def rt_hw_interrupt_enable
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;importing settings from compiler and config
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.cdecls C,NOLIST
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%{
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#include <rtconfig.h>
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#ifdef __TMS320C28XX_FPU32__
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#define __FPU32__ 1
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#else
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#define __FPU32__ 0
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#endif
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#ifdef __TMS320C28XX_FPU64__
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#define __FPU64__ 1
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#else
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#define __FPU64__ 0
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#endif
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#ifdef __TMS320C28XX_VCRC__
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#define __VCRC__ 1
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#else
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#define __VCRC__ 0
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#endif
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#ifdef RT_USING_ZERO_LATENCY
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#define ZERO_LATENCY 1
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#ifndef ZERO_LATENCY_INT_MASK
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#error ZERO_LATENCY_INT_MASK must be defined for zero latency interrupt
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#elif ZERO_LATENCY_INT_MASK & 0x8000
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#error RTOS bit (0x8000) must not be set in ZERO_LATENCY_INT_MASK
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#endif
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#else
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#define ZERO_LATENCY 0
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#endif
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%}
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.text
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.newblock
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;
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; rt_base_t rt_hw_interrupt_disable();
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;
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.asmfunc
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rt_hw_interrupt_disable:
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.if ZERO_LATENCY
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MOV AL, IER
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AND IER, #ZERO_LATENCY_INT_MASK
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.else
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PUSH ST1
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SETC INTM
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POP AL
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.endif
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MOV AH, #0
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LRETR
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.endasmfunc
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;
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; void rt_hw_interrupt_enable(rt_base_t level);
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;
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.asmfunc
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rt_hw_interrupt_enable:
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.if ZERO_LATENCY
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MOV IER, AL
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.else
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PUSH AL
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POP ST1
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.endif
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LRETR
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.endasmfunc
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;
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; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; ACC --> from
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; SP[4] --> to
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;
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.asmfunc
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rt_hw_context_switch_interrupt:
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; ACC, XAR4-7 are "save on call" following TI C28x C/C++ compiler convention
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; and therefore can be used in a function without being saved on stack first
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; (the compiler has already saved it before the call).
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; Reference: TMS320C28x Optimizing CC++ Compiler
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; note this convention is only applicable to normal functions not to isrs
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MOVL XAR6, ACC
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MOVL XAR4, *-SP[4]
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; set rt_thread_switch_interrupt_flag to 1
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MOVL XAR5, #rt_thread_switch_interrupt_flag
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MOVL ACC, *XAR5
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BF reswitch2, NEQ ; ACC!=0
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MOVB ACC, #1
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MOVL *XAR5, ACC
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MOVL XAR5, #rt_interrupt_from_thread ; set rt_interrupt_from_thread
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MOVL *XAR5, XAR6
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reswitch2:
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MOVL XAR5, #rt_interrupt_to_thread ; set rt_interrupt_to_thread
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MOVL *XAR5, XAR4
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LRETR
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.endasmfunc
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;
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; void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
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; ACC --> from
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; SP[4] --> to
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;
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.asmfunc
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rt_hw_context_switch:
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MOVL XAR6, ACC
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MOVL XAR4, *-SP[4]
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; set rt_thread_switch_interrupt_flag to 1
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MOVL XAR5, #rt_thread_switch_interrupt_flag
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MOVL ACC, *XAR5
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BF reswitch1, NEQ ; ACC!=0
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MOVB ACC, #1
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MOVL *XAR5, ACC
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MOVL XAR5, #rt_interrupt_from_thread ; set rt_interrupt_from_thread
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MOVL *XAR5, XAR6
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reswitch1:
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MOVL XAR5, #rt_interrupt_to_thread ; set rt_interrupt_to_thread
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MOVL *XAR5, XAR4
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OR IFR, #0x8000
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LRETR
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.endasmfunc
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;
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; * void rt_hw_context_switch_to(rt_uint32 to);
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; * ACC --> to
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;
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.asmfunc
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rt_hw_context_switch_to:
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; get to thread
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MOVL XAR5, #rt_interrupt_to_thread
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MOVL *XAR5, ACC
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; set from thread to 0
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MOVL XAR5, #rt_interrupt_from_thread
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MOVL XAR4, #0
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MOVL *XAR5, XAR4
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; set interrupt flag to 1
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MOVL XAR5, #rt_thread_switch_interrupt_flag
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MOVL XAR4, #1
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MOVL *XAR5, XAR4
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; trigger rtos interrupt
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OR IFR, #0x8000
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OR IER, #0x8000
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CLRC INTM
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; never reach here!
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.endasmfunc
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.asmfunc
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rtosint_handler:
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.if ZERO_LATENCY
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; mask out non-critical interrupts and enable global interrupt
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; so rtosint_handler won't block critical interrupts
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AND IER, #ZERO_LATENCY_INT_MASK
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CLRC INTM
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.endif
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MOVL ACC, *-SP[4]
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MOV AR0, AL ; save original IER
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PUSH AR1H:AR0H
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PUSH XAR2
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; get rt_thread_switch_interrupt_flag
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MOVL XAR1, #rt_thread_switch_interrupt_flag
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MOVL ACC, *XAR1
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BF rtosint_exit, EQ ; rtos_int already handled
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; clear rt_thread_switch_interrupt_flag to 0
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MOVL XAR2, #0
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MOVL *XAR1, XAR2
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MOVL XAR1, #rt_interrupt_from_thread
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MOVL ACC, *XAR1
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BF switch_to_thread, EQ ; skip register save at the first time
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PUSH XAR3
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PUSH XAR4
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PUSH XAR5
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PUSH XAR6
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PUSH XAR7
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PUSH XT
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PUSH RPC
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.if __FPU32__
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PUSH RB
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MOV32 *SP++, STF
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MOV32 *SP++, R0H
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MOV32 *SP++, R1H
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MOV32 *SP++, R2H
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MOV32 *SP++, R3H
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MOV32 *SP++, R4H
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MOV32 *SP++, R5H
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MOV32 *SP++, R6H
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MOV32 *SP++, R7H
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.endif
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.if __FPU64__
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MOV32 *SP++, R0L
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MOV32 *SP++, R1L
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MOV32 *SP++, R2L
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MOV32 *SP++, R3L
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MOV32 *SP++, R4L
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MOV32 *SP++, R5L
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MOV32 *SP++, R6L
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MOV32 *SP++, R7L
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.endif
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.if __VCRC__
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VMOV32 *SP++, VCRC
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VMOV32 *SP++, VSTATUS
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VMOV32 *SP++, VCRCPOLY
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VMOV32 *SP++, VCRCSIZE
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.endif
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MOVL ACC, *XAR1
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MOVL XAR1, ACC
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MOVZ AR2, @SP ; get from thread stack pointer
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MOVL *XAR1, XAR2 ; update from thread stack pointer
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switch_to_thread:
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MOVL XAR1, #rt_interrupt_to_thread
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MOVL ACC, *XAR1
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MOVL XAR1, ACC
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MOVL ACC, *XAR1
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MOV @SP, AL ; load thread stack pointer
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.if __VCRC__
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VMOV32 VCRCSIZE, *--SP
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VMOV32 VCRCPOLY, *--SP
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VMOV32 VSTATUS, *--SP
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VMOV32 VCRC, *--SP
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.endif
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.if __FPU64__
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MOV32 R7L, *--SP
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MOV32 R6L, *--SP
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MOV32 R5L, *--SP
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MOV32 R4L, *--SP
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MOV32 R3L, *--SP
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MOV32 R2L, *--SP
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MOV32 R1L, *--SP
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MOV32 R0L, *--SP
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.endif
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.if __FPU32__
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MOV32 R7H, *--SP
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MOV32 R6H, *--SP
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MOV32 R5H, *--SP
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MOV32 R4H, *--SP
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MOV32 R3H, *--SP
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MOV32 R2H, *--SP
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MOV32 R1H, *--SP
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MOV32 R0H, *--SP
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MOV32 STF, *--SP
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POP RB
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.endif
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POP RPC
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POP XT
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POP XAR7
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POP XAR6
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POP XAR5
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POP XAR4
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POP XAR3
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rtosint_exit:
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; do not restore interrupt here: to be restored according to the
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; switched-to context during IRET (automaticlly by hardware)
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POP XAR2
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POP AR1H:AR0H
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MOVL ACC , *-SP[4]
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MOV AL, AR0
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MOVL *-SP[4], ACC
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IRET
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.endasmfunc
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.asmfunc
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rt_hw_get_st0:
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PUSH ST0
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POP AL
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LRETR
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.endasmfunc
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.asmfunc
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rt_hw_get_st1:
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PUSH ST1
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POP AL
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LRETR
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.endasmfunc
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; C28x do not have a build-in "__ffs" func in its C compiler.
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; We can use the "Count Sign Bits" (CSB) instruction to make one.
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; CSB will return the number of 0's minus 1 above the highest set bit.
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; The count is placed in T. For example:
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; ACC T maxbit
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; 0x00000001 30 0
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; 0x00000010 26 4
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; 0x000001FF 22 8
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; 0x000001F0 22 8
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.asmfunc
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rt_hw_calc_csb:
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MOV AH, #0
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CSB ACC ; T = no. of sign bits - 1
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MOVU ACC, T ; ACC = no. of sign bits - 1
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SUBB ACC, #30 ; ACC = ACC - 30
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ABS ACC ; ACC = |ACC|
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LRETR
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.endasmfunc
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; compatible with old version
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.asmfunc
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rt_hw_interrupt_thread_switch:
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LRETR
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NOP
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.endasmfunc
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.end
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